design for testability造句
例句与造句
- Board - level design for testability based on jtag
的板级可测试性设计 - Design by contract is an important approach to design for testability of software
合约式设计是一种重要的软件易测试性设计方法。 - Design and implementation of a tool supporting contract - based design for testability of components
基于合约的构件易测试性设计支撑工具的设计与实现 - Design for testability means adjusting the structure of circuit and making the circuit easy to test
可测性设计即调整电路的内部结构，使电路变得易测。 - By using design for testability , we can abridge the contriving period and reduce the cost
对电路进行可测性设计，将缩短产品的开发周期、降低产品的开发成本。 - It's difficult to find design for testability in a sentence. 用design for testability造句挺难的
- Often , designing for testability can push the object s api toward a cleaner , more modular state
通常，用于可测性的设计可以将对象的api推向一种更清晰更模块化的状态。 - The subject of this dissertation is the research on the design for testability in the design environment of system on a chip
本论文的研究课题为片上系统（ systemonachip ，简称soc ）环境下的可测性设计方法学研究。 - This paper presents the design for testability of dspc50 . in chapter one , the mainly - used methods of design for testability are introduced firstly
第一章首先介绍了几种主要的可测性设计方法，比较了各自的特点，确定了各自的适用范围。 - If necessary , our technicians can cooperate with you to design the product , in order to transfer and apply the concepts of the design for testability
如有必要，我们的技术人员可以和您合作，共同设计开发产品，以便转换和应用测试设计理念。 - In this paper , based on the study of all kinds of technologies and ways of design for testability prevailing currently in the world , a scheme of design for testability is proposed aimed at jx5 microprocessor ’ s features and specified test requirements
本文深入研究了目前国际上数字电路的各种可测性设计技术和方法,根据jx5微处理器的特点和其对测试的具体需求,提出了一整套jx5微处理器的可测性设计方案。 - Not only the scan route solution , the built - in self - test solution and the boundary scan solution of design for testability are summarized , but also the applications and countermeasures of these 3 solutions are analysed and compared in details
摘要综述了超大规模集成电路的几种主要的可测试性设计技术，如扫描路径法、内建自测试法和边界扫描法等，并分析比较了这几种设计技术各自的特点及其应用方法和策略。 - As one of the design for testability technology , boundary scan test ( bst ) fixes boundary scan cells between the device pins and core logics . thus , the bsc acts as the virtual test probe that carries out the test stimulus and captures the test response
作为一种结构插入的可测性技术,边界扫描测试( bst )技术将边界扫描寄存器单元安插在集成电路内部的每个引脚上,其作用相当于设置了施加激励和观测响应的内建虚拟探头。 - A new tool to support design by contract is designed and implemented , which is named pkujdbct and can be used to support design for testability of components , and provide a basis for our future research on methods of contract - based design for testability of components
设计并实现了一种新的合约式设计工具pkujdbct ，为构件的易测试性设计提供有力的支撑，并为今后进一步研究基于合约的构件易测试性设计方法打下了良好的基础。 - In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ) . processor and uart ( universal asynchronous receiver transmitter ) , these cores are used in this dissertation , fpu is used for floating point complex fft processor , uart is used for fft processor " s peripheral and our test platform . in chapter 6 we discuss the design for testability , including atpg , bist and jtag method , discuss the different verification and simulation strategy in soc scale facing to different modules , build up the test platform which is used to test high performance application specified digital signal processing processor . in chapter 7 we summarize the research results and creative points , and point out the further work need to do in the future
第五章提出了基于ieee754浮点标准的浮点运算处理器的设计和异步串行通信核的设一浙江大学博士学位论文计，提出了适合硬件实现的浮点乘除法、加减运算的结构，浮点运算处理器主要用于高速fft浮点处理功能，异步串行通信核主要用于pft处理器ip核的外围扩展模块以及本文所做的验证测试平台中的数据接口部分第六章提出了面向系统级芯片的可测试性设计包括了基于扫描测试atpg 、内建自测试bist 、边界扫描测试jtag设计，在讨论可测试性设计策略选择的问题上，提出了针对不同模块进行的分别测试策略，提出了层次化jtag测试方法和扫描总线法，提出了基于fpga - The paper makes the deep discussion and research on software testing , and puts forward the groups cooperation testing model based on concurrent engineering , and combines with the instance of telecommunication monitoring system to complete design for testability , and establishes corresponding testing strategy and flow chart , so as to further enhance testing organization and management under the instruction of iso principles
本文对软件测试进行了深入探讨和研究，提出了基于并行工程的群体协同测试模型，结合电信监控系统实例进行了软件测试性设计，制定了相应的测试策略和测试流程，使软件测试在iso原则的指导下进一步加强了系统的测试组织和管理。
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